IRIS On Line Vol 01 Issue 01

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Silicon Graphics (not-yet-named) Electronic Magazine Vol 1 Issue 1 June, 1993

IRIS On-Line Logo
IRIS On-Line Subheading

Welcome to the first issue of our not-yet-named E-Magazine. Name it and win an Indigo!!

Name This Magazine And Win An Indigo!!

Welcome to the charter issue of our soon to be named publication. This e-mail list based magazine is intended as a monthly service for users of, and people with interest in, Silicon Graphics computer systems. It's mission is to provide relevant technical and product information from Silicon Graphics, 3rd Parties, and the user community. There is no fee associated with subscribing to this service.

The types of articles we would like to publish in this magazine include:

  • Silicon Graphics Press Releases
  • Silicon Graphics and 3rd Party Product Announcements
  • Technical Articles and References regarding Silicon Graphics and 3rd Party Products
  • User Group Announcements
  • Tables of Contents of Silicon Graphics Related Publications
  • Training Course Schedules
  • General Information Regarding Silicon Graphics Products and Services with pointers for further information

Win An Indigo

Silicon Graphics has always been unconventional when it comes to naming products and leading an industry. So, why should naming an electronic publication be any different? Having come up with a few prospects like SGInsider, SGI Today, IRISView, SGINet, SGI Flash, and ElectronicPipeline, we thought it would be interesting to hear what you think we should call this publication. So interested, in fact, that we are going to give you four weeks to give us your most creative suggestions. For those of you who never do anything for nothing - and wisely, we might add - there's an entry level Indigo in it for whomever has the most irreverence and imagination. Please submit your entry to name-the-emag@sgi.com by June 28, 1993. We promise to keep you up to date with all that is happening as the logo turns. (In the case of duplicate winning entries, the winner will be the person who submits the name first. Sorry, this contest is not open to Silicon Graphics employees).

To send feedback regarding this publication, send mail to nyn-editor@sgi.com with the subject "feedback". We hope you find this service useful.

Press Releases From Silicon Graphics

Stanford School Of Medicine Department Chair Lucy Shapiro Joins Silicon Graphics' Board

On June 1, Silicon Graphics announced that Stanford University School of Medicine department chair and professor Lucy Shapiro has been elected to its Board of Directors. The unanimous election of Dr. Shapiro, who has spent more than twenty-five years on medical school faculties, brings the Silicon Graphics Board's membership to eleven.

"With her years of experience and recognized leadership in the fields of molecular genetics and medicine, Lucy Shapiro brings to the Board an in-depth understanding of the needs of the scientific community, one of Silicon Graphics' key constituencies," said Edward R. McCracken, president and CEO of Silicon Graphics. "As Silicon Graphics continues to develop and deliver systems for scientists and technical professionals, Lucy's counsel and insight will be invaluable in keeping the company at the forefront in meeting the needs of this marketplace."

Dr. Shapiro, 52, is chair of the Department of Developmental Biology at the Stanford University School of Medicine, where she also holds an Endowed Chair and is a professor of Developmental Biology and Genetics. In addition, Dr. Shapiro serves on the Board of Scientific Advisors for SmithKline Beecham, a leading pharmaceutical company. Prior to coming to Stanford in 1989, she was a professor and chair of the Department of Microbiology at Columbia University's College of Physicians and Surgeons for three years. Previously, she spent twenty years on the faculty of the Albert Einstein College of Medicine's Department of Molecular Biology, holding various positions including director of the Division of Biological Sciences.

Elected to the Institute of Medicine of the National Academy of Sciences in 1991 and the American Academy of Arts and Sciences in 1992, Dr. Shapiro serves on numerous science and professional boards, including the Board of Trustees for the Scientist's Institute for Public Information, The President's Council of the University of California and The Council of the American Society for Biochemistry and Molecular Biology. She is a Fellow of the American Association for the Advancement of Science.

Dr. Shapiro earned her doctorate in Molecular Biology from the Albert Einstein College of Medicine in 1966. She received her A.B. degree from Brooklyn College in 1962.

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MIPS Technologies And American Megatrends To Deliver HAL Software For MIPS RISC-Powered Windows NT Market

MOUNTAIN VIEW, California On May 24, 1993, MIPS Technologies, Inc. announced that it has entered a relationship with American Megatrends, Inc. (AMI) for the joint development and distribution of firmware and Hardware Abstraction Layer (HAL) software for the Windows NT(tm) operating system running on current and future MIPS R4000(r), R4200(tm)and R4400(tm)-based PCs. The new firmware and HAL, key elements in designing MIPS RISC-based PCs, will be commercially available from AMI, the leading vendor of Basic Input Output Systems (BIOS) software in the PC market.

Development and distribution of firmware and HAL software are critical elements of the MIPS Open Design Center (ODC), a research and development facility that assists manufacturers in building low-cost MIPS RISC-based PCs running Windows NT. The ODC offers inexpensive design kits that allow PC manufacturers to simply and affordably replace their Intel-compatible CISC processors with 64-bit MIPS RISC processor technology, enabling them to offer computing power and functionality that far exceed traditional Intel-based PCs. AMI will offer the HAL and PROM software for these design kits.

"MIPS RISC processors deliver the tremendous CPU power necessary for the Windows NT operating system and next-generation power-hungry applications," said Wei Yen, chief operating officer of MIPS Technologies, Inc. "With AMI's experience and worldwide presence in PC system BIOS, PC makers will now have easy access to HAL technology for MIPS RISC. AMI's offerings will help to accelerate the emergence of MIPS RISC as the most pervasive power architecture for Windows NT systems."

"MIPS RISC and Windows NT provide an excellent opportunity for PC manufacturers to offer hardware design innovation and product differentiation," said S. Shankar, president of American Megatrends. "AMI has played a key role in the PC system BIOS market and plans to be the major supplier of HAL software in the emerging market for MIPS RISC-based NT platforms."

The ODC works closely with third party PC technology suppliers such as AMI to ensure availability of key components in PC manufacturing such as chipsets, evaluation boards, firmware and system software and drivers for I/O cards. By collaborating with key PC component suppliers, the ODC enables PC manufacturers to integrate leading-edge RISC technology into their product lines easily without sacrificing their current methods for bringing products to market.

HAL is a layer of software between the Windows NT operating system and the hardware platform on which Windows NT runs. It hides hardware-dependent details such as I/O interfaces, interrupt controllers and multiprocessor communication mechanisms. By decoupling the operating system and application software from the underlying hardware, HAL allows PC makers to make a variety of system design choices targeting a wide range of price/performance points.

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MIPS Technologies Announces Joint Development Of Next-Generation Microprocessor Technology

New Open RISC Architecture Sets Performance Standard For Next Decade

MOUNTAIN VIEW, California On May 10, 1993 MIPS Technologies, Inc. announced plans for joint development of the next- generation microprocessor based on its leading open RISC architecture. The new joint development program funding will accelerate the design of MIPS Technologies' first processor using speculative execution technology. Code-named T5, the product is expected to deliver more than 200 SPECint and 300 SPECfp and to serve as the heart of the world's most powerful desktop systems running Microsoft Windows NT (tm) and UNIX(r) operating systems.

The joint development includes funding for research and development, participation by partner design experts and semiconductor process development. As with the joint development programs involving MIPS' upcoming TFP, VRX and Orion processors, these efforts are expected to result in commercial availability of T5 and related software in calendar year 1994. The program is supported by Integrated Device Technology, Inc., LSI Logic Corporation, MIPS Technologies, NEC Corporation, Performance Semiconductor Corporation, Siemens A.G. and Toshiba Corporation. It will result in expenditures by this group of companies of $150 million during the program's duration.

The T5 processor, which will be developed by and available from the MIPS RISC semiconductor suppliers, represents the next generation in highly integrated processor design. Ideal for applications which require high-performance audio, video and networked workgroup computing, the T5 processor is MIPS Technologies' first speculative execution superscalar processor. The processor will also provide advanced features for multiprocessing, multi-level caches and high- speed uniprocessor systems designs.

"The development efforts of these companies will produce the most powerful processor for general-purpose desktop computing and provide the power necessary to enable a new generation of applications," said Edward R. McCracken, president and CEO of Silicon Graphics. "By working with the world's leading semiconductor companies in the development and delivery of the T5 processor, the openness of the MIPS RISC architecture is ensured."

Since 1985, the MIPS development team has provided commercial availability of the most advanced RISC processor technology in the industry. The latest MIPS products, the 64-bit R4000(tm) and R4400(tm) processors, have maintained leading application performance among both RISC and CISC processors. In October 1992, MIPS Technologies introduced the R4400, the first processor rated at 94 SPECint92 and 104 SPECfp92 designed for personal computers.

The T5 processor will be available from multiple sources worldwide and will be priced competitively with the most affordable performance components. With this announcement, MIPS RISC will continue to set the standard for open processor architectures throughout the next decade.

Semiconductor Partners

"NEC's joint development efforts with MIPS Technologies will make the T5 processor the leading RISC engine in desktop and server systems in the future," said Dr. Hajime Sasaki, executive vice president and director of NEC Corporation. "This extensive cooperation demonstrates our strong commitment to the development and delivery of current and future families of MIPS RISC microprocessors."

"Toshiba believes the MIPS RISC architecture is the leading architecture for desktop computing," said Hideharu Egawa, executive vice president and director of Toshiba Corporation. "The T5 processor will provide the best performance solution for the industry's most powerful computing systems. Toshiba will continue to deliver competitively priced, industry-leading MIPS technology for performance-intensive applications worldwide."

"By forging strong industry alliances, MIPS Technologies has been able to develop next-generation technology for a wide range of computing challenges," said Len Perham, president and chief executive officer of Integrated Device Technology. "Our company's ability to provide this leading-edge technology to our customers will keep us at the forefront of the RISC microprocessor revolution."

"The MIPS architecture is a key strategic part of the CoreWare(tm) product line," said Brian Halla, executive vice president of LSI Logic. "The T5 processor continues to demonstrate the scalability and performance capabilities of MIPS RISC processors."

"The T5 technology will set a new performance standard for computing," said Dr. Thomas Longo, chairman and chief executive officer of Performance Semiconductor Corporation. "These dramatic improvements in performance are the result of applying the right architecture to the right technology at the right time."

"The development of the T5 processor offers clear perspectives for customers in the platform business as well as in high-performance embedded control markets," said Dr. Fischer, executive vice president of Siemens' Semiconductor Division. "The T5 processor demonstrates MIPS' architectural leadership and gives Siemens the opportunity to serve its customers with the best available products."

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Siemens Nixdorf Licenses Silicon Graphics' New Challenge Servers

MOUNTAIN VIEW, California On May 18, Silicon Graphics, Inc. announced that Siemens Nixdorf Informationssysteme AG will distribute Silicon Graphics' new Challenge(tm) and Power Challenge(tm) server lines as an Original Equipment Manufacturer (OEM). Siemens Nixdorf will include Silicon Graphics' Challenge network resource servers and Power Challenge supercomputing servers as part of its core system product offerings worldwide.

The OEM licensing arrangement gives Siemens Nixdorf non-exclusive marketing rights for the new servers. The server products, which the company will offer under the product names SC800 for the Challenge systems and SC900 for the Power Challenge systems, will be added to the company's strategic product offerings which currently include Silicon Graphics' IRIS Indigo(tm), IRIS Indigo2(tm) and IRIS Crimson(tm) workstation families.

"The Challenge and Power Challenge lines, based on symmetric multiprocessing and industry-leading MIPS(r) RISC processors, will enable Siemens Nixdorf to deliver highly configurable, high-performance servers that perfectly complement the company's powerful workstation offerings," said Dr. Horst Nasko, vice chairman of Siemens Nixdorf. "These servers enhance our open systems products based on the UNIX(r) operating system by adding a completely compatible client/server solution focused on the university market with its technical and scientific applications."

"The selection of our Challenge and Power Challenge servers by Europe's number one computer manufacturer underscores the strength and flexibility of our product line," said Dr. Wei Yen, senior vice president and general manager of Silicon Graphics' Computer Systems Group. "Our relationship with this world-class partner represents a significant step in moving Silicon Graphics technology beyond traditional graphics workstation markets."

The Power Challenge line is Silicon Graphics' breakthrough line of symmetric multiprocessing supercomputing systems, which put the power of up to 18 Cray Y-MP class supercomputers in a single RISC-based system. The line includes the Power Challenge L deskside system, with up to six MIPS TFP streaming superscalar RISC processors for up to 1.8 GFLOPS of peak performance; and the Power Challenge XL rack system, which incorporates up to 18 TFP processors for up to 5.4 GFLOPS of peak performance. The systems achieve this performance level through the integration of the 64-bit TFP processors, a flexible and fast memory subsystem and a high bandwidth I/O subsystem. The Challenge line is the industry's only binary-compatible network resource server line that spans from entry-level workgroup systems to enterprise-wide symmetric multiprocessing systems delivering more than 4,000 Dhrystone MIPS of performance. The highly scaleable Challenge line includes the Challenge XL enterprise server, supporting up to 36 R4400(tm) MIPS RISC processors for the highest levels of performance and expandability; and the Challenge L departmental deskside server with up to 12 R4400 processors, offering unmatched price/performance leadership.

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MIPS Technologies And NEC Announce R4200 Microprocessor For Portable Applications

Breakthrough Design Brings Desktop Computing Power to the Portable Computing Market

MOUNTAIN VIEW, California On May 17, MIPS Technologies, Inc. and NEC Corporation announced the R4200(tm) 64-bit microprocessor, designed to deliver the capabilities of high-performance desktop computers to portable systems. The R4200 processor will enable notebook computer users to run application programs easily under Windows NT(tm) and other advanced operating systems originally targeted for desktop computing. The processor also brings superior solutions to the high-performance, low-cost embedded market. Scheduled for availability in sample volumes in late 1993, the processor has been developed by MIPS Technologies in cooperation with NEC Corporation and will be manufactured and delivered by NEC.

The first member of the MIPS(r) low-power processor family, the R4200 microprocessor is designed to meet the specific needs of high-performance, low-power, low-cost portable systems. It achieves an internal 80 MHz clock speed doubled from a 40 MHz external clock source. The R4200 processor delivers 55 SPECint92 and 30 SPECfp92, which is comparable to recently announced leading-edge desktop microprocessors. The new family of microprocessors consumes less than 1.5 watts, features low-cost plastic packaging and targets prices that are a fraction of other high-performance processors. It is the only personal computer processor designed with a unified architecture that combines integer and floating-point processing in the same structure.

"MIPS Technologies continues to change the landscape of semiconductor design. The detailed attention to power management and processor circuitry demonstrates MIPS Technologies' ability to develop innovative approaches to the mobile computing dilemma-how to provide desktop performance in an affordable form factor," said Edward R. McCracken, president and chief executive officer of Silicon Graphics. "This processor illustrates our commitment to developing products for a full range of computing challenges, putting the muscle of the world's truly open 64-bit RISC technology in the hands of power users anytime, anywhere."

The R4200 microprocessor provides true 64-bit capabilities, maintains hardware and software compatibility with the R4000(r) and R4400(tm) MIPS RISC processor families and extends the range of MIPS microprocessors running the Windows NT operating system.

"In addition to providing the desktop computing market with the MIPS RISC architecture, NEC is committed to bringing the benefits of the VR-Series of RISC microprocessors to high-performance and low-cost embedded applications," said Dr. Kani, vice president of the semiconductor group at NEC Corporation. "The VR4200 offers maximum performance at a low cost, making it ideal for laser printers, X-terminals, routers and other high-performance embedded systems."

Designed for Low Power and Low Cost

Designed specifically to run in battery-powered systems, the R4200 microprocessor incorporates several architectural enhancements to reduce cost and power consumption. In standard microprocessors, integer and floating-point numbers are calculated using separate blocks on the chip. The R4200 processor's unified architecture combines integer and floating-point processing, decreasing the cost of full-featured performance.

To save power during periods of low activity, the processor can switch to reduced power mode. In this mode, the R4200 processor operates at one-quarter of the normal frequency, causing a corresponding reduction in power dissipation. During longer periods of inactivity the processor can be "powered down." When reactivated, the "Instant-On" capability allows the system to restore the processor to its executing state quickly.

The R4200 microprocessor family will be fabricated in a 0.6-u triple-level metal CMOS process resulting in a compact die size of 8.8 mm by 9.2 mm. It includes separate on-chip direct-mapped 16 Kbyte instruction and 8 Kbyte data caches. The interface protocol is compatible with the R4000PC, simplifying system design. The R4200 will be available in a low-cost 208-pin plastic quad flat pack (PQFP) and a 179-pin ceramic pin-grid array (CPGA).

-end-

Silicon Graphics Transforms Video And Film Production With New Silicon Studio

Revolutionary Digital Solution Couples Latest Video Technology with World's Fastest Graphics Systems

MOUNTAIN VIEW, California On April 20, Silicon Graphics, Inc. unveiled Silicon Studio(tm), a revolutionary video and film production solution that fuses computer-generated graphics, digital video and advanced digital audio on general-purpose computer systems. Based on Silicon Graphics' workstation, server and video offerings, Silicon Studio incorporates leading software applications and hardware products from the world's most innovative suppliers of video and film production tools.

"The unveiling of Silicon Studio signals a new creative paradigm for video and film production," said Michael Ramsay, senior vice president and general manager of Silicon Graphics' Visual Systems Group. "Producers, editors and other creative professionals have long sought the compelling economic advantages of Silicon Studio -- a revolutionary solution that delivers them from the costly limitations of specialized equipment. By teaming the world's fastest graphics with supercomputer-class systems and leading-edge applications, Silicon Studio represents the future of the post-production suite."

A key element of the Silicon Studio revolution is the Challenge(tm) video server, which simplifies collaboration and sharing of video resources. Based on an advanced symmetric multiprocessing architecture, this cost-effective system supports up to 36 CPUs, 16 GB of main memory and multiple concurrent streams of realtime video data. The server stores up to 30 hours of uncompressed on-line video and is ideal as a central resource for post-production and broadcasting applications.

Integrating Silicon Graphics' full line of graphics systems and servers, Silicon Studio includes three new Silicon Graphics products for professional video production: the Galileo Video(tm) adapter and Cosmo Compress(tm) JPEG compression option for Silicon Graphics' Indigo(tm) family of desktop systems, and Sirius Video(tm), the latest-generation video solution for Silicon Graphics' high-end workstations and servers.

Galileo Video provides video input, output and effects for all Silicon Graphics' desktop RISC PCs and workstations, transforming an IRIS Indigo(tm) or Indigo2(tm) system into a personal post-production suite for video professionals. The new solution delivers real-time and frame-by-frame input and output of video in high-quality component analog formats (Y/R-Y/B-Y) as well as industrial-quality S-video and composite formats. The Galileo Video D1 option provides two additional independent channels of CCIR 601 digital video. Special and real-time features include on-board alpha blending and scan conversion for output of high-resolution graphics to video. Galileo Video will be available in third quarter 1993 for $6,499 as an add-in board for Silicon Graphics' Indigo family.

Cosmo Compress is a real-time JPEG compression and decompression option for Silicon Graphics' Indigo family. Cosmo Compress makes digital video manageable, enabling real-time video capture and playback and reducing media storage requirements. This solution allows editors and producers to capture video to memory or disk at full video frame rates and resolutions. Cosmo Compress connects directly to Galileo Video via two digital video channels, ensuring the real-time transfer of video data. Even without Galileo Video, Cosmo Compress enables the creation, editing and playback of full frame rate, full resolution digital movies. Cosmo Compress is priced at $4,995 and will be available in third quarter 1993.

The Sirius Video digital video option board provides premier broadcast-quality video for Silicon Graphics' family of high-end workstations and servers. Sirius Video blends real-time digital video processing, computer-generated graphics, 3D geometry, image processing and supercomputing processing performance in a single system. With Sirius Video, users can produce broadcast quality video complete with digital video effects, character generation and titling. The product supports multiple video formats including 8-bit or 10-bit D1 CCIR 601 digital video, as well as analog component, analog composite and S-Video I/O capabilities. Sirius Video will be available in third quarter 1993 for $24,900 as an add-in board for Silicon Graphics' performance graphics systems, including RealityEngine2(tm) graphics, the world's fastest computer graphics.

Anchoring the Silicon Studio production environment are Silicon Graphics' powerful graphics systems and digital media servers, including the IRIS Indigo RISC PC, the Indigo2 desktop workstation, IRIS Crimson(tm) and Onyx(tm) workstations and Challenge servers. From desktops to servers, Silicon Graphics systems are designed to handle effectively the massive amounts of data throughput that video and film production requires.

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MIPS R4000 Development Tools Now Available On Intel PCs

MOUNTAIN VIEW, California On April 14, MIPS Technologies Inc. announced RISCross(tm) software development tools for Intel(tm) microprocessor-based PCs and compatibles running Microsoft Windows(tm) 3.1 operating system. The new tools enable embedded control programmers to implement their MIPS R3000(r) and R4000(tm) designs on development platforms based on Intel microprocessors, completing the cross-development tool suite for the MIPS Magnum(tm) and SUN SPARCstation(tm) platforms.

"By offering our cross-development tools to the PC user, we're reaching the number one computer user for embedded control design," said Mike Polen, software product manager for MIPS Technologies. "Personal computers are increasingly used in conjunction with workstations to develop embedded control programs. These designers have found it critical to have the option of employing a full range of platforms, and MIPS Technologies has given them the tools to do just that."

The RISCross Development tools will run on Intel 80386(tm) and 80486(tm)microprocessor-based systems and will generate code for a MIPS R3000- or R4000 microprocessor-based product. MIPS offers these RISCross development tools for the R3000 and R4000 microprocessors to help customers leverage their current investments in hardware and meet their needs for secondary systems or for smaller design programs.

An important component of the new RISCross tools is the MIPS RISCross(tm) compiler, which provides designers with a proven and complete code generation tool. The compiler includes all the support utilities needed to develop R3000 and R4000 code on the Intel microprocessor-based systems.

The RISCross development tools also include the System Programmer's Package/embedded (SPP/e) and the SABLE3000(tm) Architecture Simulator. Both the SABLE(tm) Architecture Simulator and the SPP/e support the R3000 processor and include a graphics debugging interface based on the Windows operating system. The SABLE Architecture simulator provides simulation of standard devices such as a serial port and disk controller.

The SPP/e development package includes a debugging monitor, stand-alone I/O libraries and software and generation utilities for system PROMs. This programmer's package contains all the software components necessary to develop and debug code and to optimize the performance of a system or an embedded design.

In addition, embedded system design tools are available from more than 20 third-party vendors. These vendors develop tools such as real-time operating systems, VME boards, language development systems for ADA and C, logic analyzers and hardware and software simulation models. Pricing and availability of third-party products are available from their respective suppliers.

Third Parties Offering Software Development Tools

  • American Arium
  • Biomation Corporation
  • BSO Tasking
  • Creative Electronic Systems
  • DDCI, Inc.
  • Embedded Performance
  • HDL Systems
  • Heurikon Corp.
  • Hewlett-Packard Co.
  • JMI Software Consultants, Inc.
  • Lockheed Sanders, Inc.
  • Logic Automation, Inc.
  • Logic Modeling Systems
  • Lynx Real-Time Systems, Inc.
  • Omnibyte Corp.
  • Ready Systems, Inc.
  • RISQ Modular Systems, Inc.
  • Tektronix, Inc.
  • Telesoft, Verdix Corp.
  • Wind River Systems, Inc.

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Industrial Light & Magic And Silicon Graphics Announce JEDI

SAN RAFAEL, California On April 7, Industrial Light & Magic (ILM), a division of Lucas Digital Ltd., and Silicon Graphics, Inc. announced the creation of JEDI (the Joint Environment for Digital Imaging), the largest and most advanced production environment for the creation of digital imagery in the entertainment industry. With Silicon Graphics systems as its core, JEDI marks the alliance between the world's leading visual effects facility and the premiere manufacturer of visual computing systems.

Located at ILM's facilities in San Rafael, California, JEDI will combine proprietary digital scanning and film recording technology with the most advanced digital production facility serving the motion picture, television, commercial and attractions industries. In addition, JEDI will function as a media lab for developing innovative marriages of advanced equipment designs with new production software and techniques. Under an exclusive program, JEDI will be updated progressively with Silicon Graphics' most advanced systems so that the newest equipment can be tested and enhanced in an actual production environment.

"This alliance will be important to the industry," said George Lucas, chairman of the board of Lucas Digital Ltd. "It allows for ILM's ground-breaking imagery to become more affordable to the entertainment community. In addition, ILM's artists and technicians working together with Silicon Graphics engineers will accelerate the development of the technology necessary to explore new creative possibilities. It is the dawning of a new entertainment age, and ILM and Silicon Graphics are dedicated to leading that charge into the future."

"Silicon Graphics has long benefited from its relationship with technologically sophisticated customers such as Industrial Light & Magic," said Edward R. McCracken, president and chief executive officer, Silicon Graphics. "The Lucas organization represents the vanguard of digital effects producers, demanding advanced features from our systems long before others recognize their possibilities. This teaming will propel digital technology into new markets in entertainment and communications."

JEDI will be linked through digital tie-lines to facilities in Los Angeles and Hollywood and can be delivered via satellite to locations throughout the world. This communication technology will allow ILM to deliver digital broadcast-quality images directly to the client without the distortion associated with typical cable transmission. Clients can analyze and approve work in progress without leaving their facilities or distant locations. This interactive systems has already been used to provide images to Steven Spielberg's Amblin Entertainment, both in Los Angeles and on location in Poland.

The launch of JEDI follows the recent announcement of the formation of Lucas Digital Ltd., the new company comprising ILM and Skywalker Sound. Dedicated to serving the needs of the entertainment industry for visual effects and audio post-production, Lucas Digital Ltd. is headed by newly appointed president and chief executive officer Lindsley Parsons, Jr.

ILM, long recognized as the pioneer in digital and computer graphics production, has just received its latest Academy Award for Best Visual Effects for its computer graphics work in "Death Becomes Her". Since its formation in 1975, ILM has created special visual effects for more than 80 motion pictures. In the last 15 years, the company has been nominated for 20 Academy Awards and has won 12 Oscars, five Technical Achievement Awards and two Emmys. ILM's ten visual effects supervisors, including Dennis Muren and Ken Ralston, are the most highly honored in the business.

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Technical Articles And References

Explorer Frequently Asked Questions List - Overview And How To Get It

Version 0.2 Last Altered 12th April 1992 - G.C. (Gordon Cameron)

This document contains answers to some Frequently Asked Questions (FAQs) asked of the Explorer Modular Visualisation Environment (MVE).

The latest update of this can always be obtained by FTP from :

  • UK Site : ftp.epcc.ed.ac.uk (129.215.56.29)
  • US Mirror : swedishchef.lerc.nasa.gov (139.88.54.33)

If you wish to be part of the Explorer mailing list, comment on this FAQ, add/alter/CORRECT any questions, or have any suggestions, please email:

  • explorer-request@castle.ed.ac.uk, or
  • gordonc@epcc.ed.ac.uk

N.B. The compilers of this FAQ are independent of SGI (developers of Explorer) - this also means that any inaccuracies are most probably our own faults ! Thanks to the XUG and the X FAQ for ideas.

  • Gordon Cameron (Edinburgh Parallel Computing Centre) gordonc@epcc.ed.ac.uk
  • Chris Thornborrow, Matthew White (EPCC)

Additionally, there is a newsgroup specifically for discussion on Explorer, and that's comp.sys.graphics.explorer.

Topics (in the FAQ)

A) TOPIC: GENERAL INFORMATION

  • A.1) What is Explorer ?
  • A.2) What platforms will Explorer run on/what are the requirements ?
  • A.3) How can I get Explorer ?
  • A.4) Modules, Maps & Ports - What are they ?
  • A.5) What is the Map Editor/Librarian ?
  • A.6) What Data Formats can Explorer handle ?
  • A.7) What is the Data Scribe ?
  • A.8) What is the Module Builder ?
  • A.9) What are the MCW and MDW ?
  • A.10) What is an MVE ?
  • A.11) What other MVEs are there ?
  • A.12) Is there any overlap between ImageVision and Explorer ?

B) TOPIC: RUNNING EXPLORER

  • B.1) Why does Explorer crash immediately ? +
  • B.2) Can I run Explorer on one machine and display on another ?
  • B.3) Can I run modules on different machines ?
  • B.4) How can I start Explorer with a prefined map ?
  • B.5) Can I run Explorer in batch mode (i.e. without the GUI) ?
  • B.6) Will Explorer work with very large data sets ?
  • B.7) When does a module fire ?
  • B.8) Why does Explorer run slowly on my system ?
  • B.9) How can I customize the look of Explorer ?

C) TOPIC: USING EXPLORER with the MAP EDITOR

  • C.1) Why does Explorer ignore all my input ? @
  • C.2) Why can't I start a GenerateColormap module ?
  • C.3) How can I stretch the librarian scrolling list ?
  • C.4) How can I slice into an iso-surface ?
  • C.5) How can I render translucent solids ?
  • C.6) Why can I not get LatFunction to work ? +@

D) TOPIC: USING THE DATASCRIBE

  • D.1) Why does the help file not reflect the actual widget ? @

E) TOPIC: USING THE MODULE BUILDER F) TOPIC: PROGRAMMING MODULES

  • F.1) How can I wake Explorer on events ?
  • F.2) What has happened to the routine cxInputPortStateGet ? @

G) TOPIC: MODULES AVAILABLE/WANTED

  • G.1) Where can I get PD modules ? +

H) TOPIC: FURTHER INFORMATION

  • H.1) Where can I obtain documentation (e.g. Module Writers' Guide) ? *
  • H.2) Is there a mailing list/FTP site ? *
  • H.3) Is there a relevant newsgroup ?
  • H.4) Why are the electronic PostScript files incomplete ? *

I) TOPIC: MISCELLANEOUS

  • I.1) How can I add/correct or comment on Q&As on the FAQ ?
  • I.2) Where can I find a list of bugs ? +

-end-


comp.sys.sgi.* Newsgroups Available Via WAIS

By

Harry Mangalam
Dept of Biocomputing
The Salk Institute
10010 N Torrey Pines Rd
La Jolla CA 92037

Vox:(619) 453-4100, x250
Fax:(619) 552-1546

mangalam@salk-sc2.sdsc.edu
hjm@salk-sgi.sdsc.edu
mangalam@salk.bitnet

All of the comp.sys.sgi (and comp.sys.mips) newsgroups are now available by WAIS searching on the same server as the initial one (see sample src at end).

In (slightly more than) 25 words what this means is that if you have a question about SGI hardware, software, CPUs, versions of IRIX, how to dump to a remote 8mm (or more frantically, how to retrieve your data from a remote 8 mm), or wonder who has ever been befuddled by your particular problem, instead of posting to the newsgroup first, you can fire up a WAIS client, point it at my server and it will search thru the entirety (~65MB) of the comp.sys.sgi groups (since SGI start keeping records of it) to find out. Recently, the original group split into ~.admin, ~.announce, ~.apps, ~.bugs, ~.graphics, ~.harware, and ~.misc with substantial cross-posting, as well as continuing the original. With the exception of ~.announce, these are all available for searching.

WAIS clients are freely available for almost all unix systems (as well as precompiled versions for Macs, NeXTs, and Win/DOS PCs) as part of the WAIS distribution. Curses based, Xwin, and command line versions exist. As well, WAIS sources (src files) are understood by gopher clients, so these dbs will shortly be available via gopher as well.

You may pick up the WAIS distribution from boombox.micro.umn.edu, as well as source for gopher clients. I'd avoid the freeWAIS distribution unless you like a challenge.

The xgopher client is tremendously useful and builds very easily (I'd also highly recommend xv3.0 as the image viewer). The xwais client is a slightly more obstreperous build, but you can obtain the frequently mentioned xmosaic (as an sgi binary or source) from zaphod.ncsa.uiuc.edu in /Web/xmosaic/{etc}.

For now, the newsgroups are in separate databases and will likely remain so for a bit until I decide on the best way to merge them. As such, you have to query each separately; an advantage is that if you know what you're looking for, the search will be much faster than for a merged db.

If you want to search _all_ the sgi groups, you can use some WAIS clients such as xwais or Mac WAIStation that allow you to query multiple databases at once; this will search one after the other automatically.

The host server may be moving around a bit for the next little while, but should remain offline no more than an hour, so if you fail to get a return in ~30s, ping it to see if it's alive (IP#= 192.31.153.23 aka rangersmith.sdsc.edu) - if it's not, please notify me.

If you haven't got a clue about WAIS and/or gopher, send me mail and I'll return a blurb that should get you going.

Below is the WAIS src record for comp.sys.sgi. Just save it to the indicated file. For the other groups, just change "comp.sys.sgi" to "comp.sys.sgi.admin" etc (or comp.sys.mips if you so desire) and save them in separate files.

Sample src for comp.sys.sgi follows:


----- begin file ~/wais-sources/comp.sys.sgi.src -----
(:source
:version  3
:ip-address "192.31.153.23"
:tcp-port 210
:database-name "comp.sys.sgi"
   :cost 0 
   :cost-unit :free 
   :maintainer "mangalam@salk-sc2.sdsc.edu (Harry Mangalam)"
:description "Created with XWAIS by Mar 19 17:33:54 1993 on hunter@work.")
 
----- end file ~/wais-sources/comp.sys.sgi.src -----

!!!!!!!!!!!!!!!!! Please let me know if you have problems !!!!!!!!!!!!!!!!!

Happy WAISing, Harry

-end-


PIPELINE May/June Issue Table Of Contents

Articles in the May/June 1993 issue (vol. 4 issue 3) of PIPELINE include:

  • Adding Attitude to Your Application with Audio
  • Questions and Answers
  • How to Set Up a Basic SLIP Connection
  • Solving Problems: The IRIS InSight Advantage
  • Locating a Defective SIMM
  • How to Save Rendered Images From Within IRIS Explorer

PIPELINE is a bi-monthly magazine published by the Customer Support Division of Silicon Graphics, Inc. for support contract customers. Inquiries regarding your subscription may be sent to pipeline@sgi.com. Please include the serial number of your Silicon Graphics system.

-end-


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