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==M==
 
==M==
 
* '''MCU''' (Memory Control Unit), a custom IC that connects to the system bus and controls regular and burst-mode data transfers to and from the main RAM and ROM
 
* '''MCU''' (Memory Control Unit), a custom IC that connects to the system bus and controls regular and burst-mode data transfers to and from the main RAM and ROM
 +
* '''MEMC'''. The MEMC provides the control and timing signals for the ROM, RAM, and VRAM. It also includes the logic that controls the system bus arbitrations and the frame buffer controller that provides the video timing and control signals.
 
* '''MEMCjr'''. The MEMCjr IC combines functions performed by several ICs in previous Macintosh designs. Control and timing signals for the ROM, RAM, and VRAM, a frame buffer controller for the video display.
 
* '''MEMCjr'''. The MEMCjr IC combines functions performed by several ICs in previous Macintosh designs. Control and timing signals for the ROM, RAM, and VRAM, a frame buffer controller for the video display.
 
* '''MESH'''. The MESH IC is a custom IC that controls the SCSI bus to the internal SCSI devices. Because this bus does not have to drive a long external bus, it can operate at higher transfer rates than the external SCSI bus.
 
* '''MESH'''. The MESH IC is a custom IC that controls the SCSI bus to the internal SCSI devices. Because this bus does not have to drive a long external bus, it can operate at higher transfer rates than the external SCSI bus.
 
* '''Mickey'''. The Mickey is a composite video encoder in a 28-pin advanced bipolar CMOS chip. It is used in the AV card.
 
* '''Mickey'''. The Mickey is a composite video encoder in a 28-pin advanced bipolar CMOS chip. It is used in the AV card.
 +
 
==O==
 
==O==
 
* '''O’Hare'''. The O’Hare IC is based on the Grand Central IC present in the Power Macintosh 7500 computer. It is an I/O controller and DMA engine for Power Macintosh computers using the PCI bus architecture
 
* '''O’Hare'''. The O’Hare IC is based on the Grand Central IC present in the Power Macintosh 7500 computer. It is an I/O controller and DMA engine for Power Macintosh computers using the PCI bus architecture

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