XIO supports basic read/write memory transactions. IRQs are sent through XIO by instructing a device to write a defined value to some register in another XIO widget. This write actually triggers the IRQ handling process in the interrupt controller. For instance, the [[SGI_Octane#HEART|HEART]] chip has such register at 0x80 in XIO widget space. | XIO supports basic read/write memory transactions. IRQs are sent through XIO by instructing a device to write a defined value to some register in another XIO widget. This write actually triggers the IRQ handling process in the interrupt controller. For instance, the [[SGI_Octane#HEART|HEART]] chip has such register at 0x80 in XIO widget space. |