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Ultra ATA

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A Quantum White Paper

Performance-enhanced interface -- with transfer rate-doubling protocol -- dramatically improves throughput, heightens integrity and saves costs without major system modifications.


In the computer world, as elsewhere, the word "system" implies an ordered complex of components, all working in balance. Ideally, advances in microprocessor performance, more capable operating systems (OS), application software and higher capacity, higher performance data storage all move in lockstep, each leveraging the other. But to take advantage of these enhancements, the connection between host and storage must be similarly improved. Specifically, the internal data rates of hard disk drives have been getting so fast that the host/drive connection is becoming a performance bottleneck ó and an interface improvement is needed to regain balance.

The vast majority of desktop systems shipping today -- upwards of 90 percent -- rely on the ATA/IDE hard disk drive interface for moving data between the disk drive buffer and system memory. This dominance is not likely to change in the near future. The current interface, called Fast ATA, supports a burst data transfer rate of 16.7 megabytes per second (MB/s). To avoid bottlenecks during sequential transfers -- such as system boot-up, the loading of increasingly large programs, and especially desktop video applications -- it is now necessary to greatly increase this transfer rate to keep up with internal data rate improvements.

This paper explains how, with the development of the new transfer protocol of Ultra ATA, Quantum has doubled the burst transfer rate to 33 MB/s, providing higher levels of disk throughput yet also enhancing data integrity. It also examines the cost benefit resulting from a drive designer's ability to avoid adding extra buffer memory to compensate for a slower rate.

Already, the industry is lining up behind Ultra ATA. Chipset vendors, including market-leader Intel Corporation, have announced support of the new protocol, as have all leading hard drive manufacturers, including IBM, Maxtor, Seagate Technology and Western Digital. The first drives with Ultra ATA -- the Quantum Fireball ST series of 3.5-inch hard drives -- debuted in October 1996, and the first desktop systems incorporating Ultra ATA technology will likely ship in early 1997. With full backwards compatibility with Fast ATA, Ultra ATA is on track to become the new industry standard ATA/IDE protocol. And with performance that now rivals that of Ultra SCSI, ATA's dominant position on the desktop may grow even stronger.

Problem: The Need For Speed

Continually faster microprocessors, ballooning file sizes, multitasking operating systems, higher bandwidth buses, higher performance hard drives -- the need for speed saturates today's desktop systems. As it turns out, a hard drive's speed scales naturally with the drive's capacity, and the disk drive industry traditionally doubles disk storage capacity every eighteen months. This is accomplished by making the tracks on the disk closer together (track density) and by making the data written on each track more dense (linear density), usually in roughly equal proportion. As a result, linear density doubles about every three years. This in turn doubles the drive's internal data rate because more data is available to come streaming off the disk during each rotation.

In addition, because a drive's internal data rate depends on both linear density and rotational speed, the tendency to increase rotational speed over time accelerates this doubling of the internal data rate (see Figure 1).


Figure 1

A hard drive's internal disk data rates continue to increase with expansions in disk capacity and higher rotational speeds

At the same time, file sizes are increasing dramatically as the result of larger programs, emerging multimedia applications and so on. On a defragmented disk, these files are typically written sequentially -- track after contiguous track.

The transfer of large files can be particularly affected by the transfer rate. This is because the drive, with its fast internal data rate, may be filling its buffer faster during sequential reads than the host can empty it (see Figure 2). Let's look at why.


Figure 2

Fast internal transfer rates mean that a drive's buffer can fill faster than the host--using Fast ATA--can empty it and turn around commands, resulting in "slipped revs"

Inefficient bus utilization

Today's fastest high-density drives can sustain sequential transfers into the buffer at just over 10 MB/s. One would think that, with a burst transfer rate of 16.7 MB/s, Fast ATA could easily keep the buffer from becoming full. The reason it can't has to do with the turnaround time the host computer (PC) takes between the commands it issues to the drive.

This command turnaround time -- during which the bus remains idle -- is essentially overhead and constitutes a very significant portion of the overall time available on the bus.

Because the effective data transfer rate of the bus equals the burst transfer rate minus the command turnaround time, it is this overhead that can make the effective transfer rate of Fast ATA insufficient.

What it boils down to is that host PCs are not making efficient enough use of the ATA bus. Command turnaround overhead is propagated by the number of commands a host makes to a drive, which in turn is dependent on the size of the requests. These requests are typically 4 KB in size ó equivalent to the page size supported by a virtual memory operating system. Let's do the math.

Running the numbers

It takes approximately 400 microseconds(µs) for a drive to read 4 KB of data into its buffer at a sustained sequential data rate of 10.2 MB/s. Given Fast ATA's burst transfer rate of 16.7 MB/s, the host can empty the buffer of 4 KB in about 250µs. This leaves 150µs for overhead between commands -- to keep the filling and the emptying of the buffer in balance. Unfortunately, the fastest desktop PCs have command turnaround times in the 275µs range. Thus you are looking at 525µs to empty 4 KB from the buffer, which reduces the effective transfer rate of Fast ATA to approximately 7.8 MB/s (4096 bytes divided by 525µs). That's quite a bit lower than its 16.7 MB/s burst transfer rate.

7.8 MB/s is also only 75 percent of the drive's 10.2 MB/s sequential data rate -- meaning that for every three bytes sent to the host, one byte accumulates in the buffer. Thus, each time three buffers worth of data is sent to the host, one buffers worth of data is accumulated, and the drive must "slip a rev"(allow the desired sector to rotate once again past the head) to allow the host to drain the buffer. Given that a buffer segment is typically 64 KB, a rev would be slipped roughly every 256 KB -- a distinct underutilization of a drive's capabilities.

Figure 3

By doubling the rate at which the buffer is emptied, Ultra ATA compensates for command turnaround overhead and avoids "slipped revs."

Solution options

There are several ways to address the situation so that ATA is no longer a bottleneck. The traditional method is to improve the burst transfer rate at the system level by implementing Ultra ATA, for example, so that the time spent actually transferring the data from the buffer is reduced. For example, with Ultra ATA's 33 MB/s burst transfer rate, a 4 KB data block transfers in just 125µs. This leaves 275µs for overhead. 125µs plus 275µs yields 400µs, matching the buffer fill rate discussed above. As a result, the buffer does not accumulate data and no revs are slipped.

There are two other options as well, both of which lie outside the control of a disk drive vendor. The more difficult way would involve reducing command turnaround times. Increases in processor speed can contribute here, but the present improvement rate is insufficient so decisive improvements would require re-architecting the interrupt priority structure. An easier approach might be to increase the size of host-to-drive requests. Doubling the request size from 4 KB to 8 KB, for example, would cut the fixed command turnaround overhead in half. Should it prove difficult or impractical to extend ATA beyond 33 MB/s through further protocol changes or hardware modification (e.g. reduced cable length, etc.), increasing the request size may prove to be the most propitious approach.

Buffering the consequences

One way to visualize the data transfer rate/buffering paradigm illustrated in Figure 2 is through a faucet, sink, and drain analogy. During a read operation, the faucet represents data coming from the disk, while the sink is the buffer and the drain is the ATA/IDE interface to system memory. When data trickles from the faucet, as is the case with random data transfers (small files, etc.), then a small sink and a narrow drain are quite adequate. But when it streams in a continual flow, as in sequential transfers, then a narrow drain necessitates a large sink to avoid a constant turning off-and-on of the faucet (i.e. slipped revs). Widening the drain appropriately, on the other hand, means you can get away without having to put in a larger sink or buffer. The idea behind the Ultra ATA protocol, then, is to increase the size of the "drain" in order to increase throughput by transferring data much more quickly -- and, along the way, eliminating the need for more extensive buffers (today's desktop high density drive buffers are typically 128K of DRAM in size).

How Did They Solve It?

Double the burst transfer rate. Improve signal and data integrity. Maintain backwards compatibility so a systems vendor can stock a single drive that works with both old and new systems. Avoid adding costs. While this sounds like a list of mutually exclusive objectives, it is exactly what has been achieved with Ultra ATA.

The primary design breakthrough was recognition of the sub-optimal way signaling was done on the ATA bus up through Fast ATA. In particular, data has always been sent on the positive transition of the strobe signal. But negative transitions exist as well, so why not use them? Employing both edges allows Ultra ATA to effectively double the available transition frequency -- without actually increasing the frequency of the strobe, which would have introduced noise -- and thus double the burst transfer rate (see Figure 4).


Figure 4

While the clock ticks: Ultra ATA

makes optimal use of available time

Improving timing margins

Ultra ATA improves timing margins by eliminating propagation and data turnaround delays. During a read under Fast ATA, the drive must wait for the strobe from the host (propagation delay) before taking some time to respond by putting data on the bus (data turnaround delay) - for which the host must then wait (more propagation delay). All these events must occur with a fixed time window between the falling edge of the strobe and the rising edge, when data is latched in the host.

The Ultra ATA protocol eliminates these delays by having the drive be the source of both the strobe and the data during a read. Since the strobe and data signal travel in the same direction down the cable simultaneously, propagation delay in the opposite direction is eliminated. And since the drive controls both strobe and data, there is no data turnaround delay. With the time window remaining constant, less delay means improved timing margins during reads.

Additional integrity assurance

On top of improved timing margins, the protocol of Ultra ATA also implements a significant feature new to ATA called Cyclical Redundancy Check (CRC) to provide data protection verification. CRC is calculated on a per-burst basis by both the host and the drive, and is stored in their respective CRC registers. At the termination of each burst, the host sends the contents of its CRC register to the drive, which compares it against its own register's contents.

For even greater integrity, the protocol can be used at speeds slower than its maximum 33MB/s. In these cases, signal and data integrity will still surpass that of Fast ATA and earlier protocols at a given burst transfer rate -- in fact, the slower the Ultra ATA transfer speeds, the greater the integrity margins.

Maintaining Backward Compatibility

A drive that implements the protocol of Ultra ATA can be fully backwards compatible with older ATA modes. This means that drives supporting Ultra ATA will also support Fast ATA and can be used with existing Fast ATA host chipsets. These systems can take advantage of the new speed and integrity features by upgrading with an Ultra ATA PCI adapter.

Plug and play

PC vendors that wish to fully incorporate the advantages of Ultra ATA in their new systems can easily do so by using new chipsets from Intel and other leading chip set vendors licensing the technology. No new cabling or adapters are required, nor have there been any additions to the chipset pin count.

Net Gains

By doubling the burst transfer rate for ATA/IDE drives, the protocol of Ultra ATA goes a long way towards bringing the effective transfer rate of the system's bus and a drive's internal data rate into balance -- with an eye firmly on the future. Ultra ATA allows systems designers to immediately provide greater system throughput, particularly for long sequential transfers such as those integral to emerging audio/video applications. Systems will boot faster and increasingly large applications will be able to be invoked much more quickly. Designers can also be assured of increased data integrity even as the data streams dramatically faster. In addition, the advantages of Ultra ATA can be implemented without delay and with minimal expense.

At the hard drive design level, storage vendors can now meet these systems needs and are freed from the specter of having to resort to implementing larger drive buffers. The resulting savings in additional DRAM will naturally be reflected in lower costs-per-megabyte of storage.

Looking towards the future, as the issue of host turnaround is resolved over time to allow systems to make more efficient use of the ATA/IDE bus, Ultra ATA's 33 MB/s burst transfer rate will be there for the additional advantage of these systems. And Ultra ATA may be able to be enhanced to even higher burst transfer rates.

See Also