Revision as of 00:17, 26 September 2020

First model of the PowerPC line as part of the AIM alliance between Apple, IBM and Motorola.

The first Macintosh models to use the PowerPC include the Power Macintosh 6100, Power Macintosh 7100 and Power Macintosh 8100.

General Information

The principal features of the PowerPC 601 microprocessor include

full RISC processing architecture
parallel processing units: one integer unit and one floating-point unit
a branch manager that can usually implement branches by reloading the incoming instruction queue without using any processing time
an internal memory management unit (MMU)
a single built-in 32 KB cache for data and instructions

@@ Line 1: / Line 1: @@
-<html>
-<script async src="//pagead2.googlesyndication.com/pagead/js/adsbygoogle.js"></script>
-<!-- misc-responsive -->
-<ins class="adsbygoogle"
-    style="display:block"
-    data-ad-client="ca-pub-8542359430745061"
-    data-ad-slot="5971110325"
-    data-ad-format="auto"
-    data-full-width-responsive="true"></ins>
-<script>
-(adsbygoogle = window.adsbygoogle || []).push({});
-</script>
-</html>
 [[File:Ppc601.jpg|thumb]]
@@ Line 19: / Line 5: @@
 The first Macintosh models to use the PowerPC include the [[Power Macintosh 6100]], [[Power Macintosh 7100]] and [[Power Macintosh 8100]].
+=General Information=
+The principal features of the PowerPC 601 microprocessor include
+* full RISC processing architecture
+* parallel processing units: one integer unit and one floating-point unit
+* a branch manager that can usually implement branches by reloading the incoming instruction queue without using any processing time
+* an internal memory management unit (MMU)
+* a single built-in 32 KB cache for data and instructions
+=See Also=
+* [[PowerPC 604]]
-[[Category:Computing]][[Category:Apple]]
+[[Category:Apple]]
+[[Category:Processors]]
+[[Category:IBM]]
+[[Category:Motorola]]
+[[Category:PowerPC]]