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Difference between revisions of "PowerPC 604"

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Developed as part of the Apple/IBM/Motorola alliance. The 604 was used in a number of [[Apple Computer]] systems, some IBM RS/6000 models and other systems/applications. This CPU is also used in the [[Motorola Atlas]] system.
 
Developed as part of the Apple/IBM/Motorola alliance. The 604 was used in a number of [[Apple Computer]] systems, some IBM RS/6000 models and other systems/applications. This CPU is also used in the [[Motorola Atlas]] system.
  
==PowerPC 604e==
+
=General Information=
 +
The principal features of the PowerPC 604 microprocessor include
 +
* full RISC processing architecture
 +
* parallel processing units: one load-store unit, two integer units, one complex integer unit, and one floating-point unit
 +
* a branch manager that can usually implement branches by reloading the incoming instruction queue without using any processing time
 +
* an internal memory management unit (MMU)
 +
* separate built-in caches for data and instructions, 16 KB each, four-way set associative
 +
 
 +
=PowerPC 604e=
 
Improves performance over the 604 with additional L1 cache and faster clock speeds.
 
Improves performance over the 604 with additional L1 cache and faster clock speeds.
  
 
=See Also=
 
=See Also=
 
* [[Apple Computer]]
 
* [[Apple Computer]]
 +
* [[PowerPC 601]]
  
 
+
[[Category:Apple]]
[[Category:Computing]][[Category:Apple]]
 
 
[[Category:Processors]]
 
[[Category:Processors]]
 
[[Category:IBM]]
 
[[Category:IBM]]
 +
[[Category:Motorola]]
 +
[[Category:PowerPC]]

Latest revision as of 23:17, 25 September 2020

8521249898 a2c1bce13a z.jpg

Developed as part of the Apple/IBM/Motorola alliance. The 604 was used in a number of Apple Computer systems, some IBM RS/6000 models and other systems/applications. This CPU is also used in the Motorola Atlas system.

General Information

The principal features of the PowerPC 604 microprocessor include

  • full RISC processing architecture
  • parallel processing units: one load-store unit, two integer units, one complex integer unit, and one floating-point unit
  • a branch manager that can usually implement branches by reloading the incoming instruction queue without using any processing time
  • an internal memory management unit (MMU)
  • separate built-in caches for data and instructions, 16 KB each, four-way set associative

PowerPC 604e

Improves performance over the 604 with additional L1 cache and faster clock speeds.

See Also